APA
CIletti D Michael, . (2010). Modelling Synthesis and Rapid Prototyping with the Verilog HDL. New Delhi: Pearson.
Chicago
CIletti D Michael, . 2010. Modelling Synthesis and Rapid Prototyping with the Verilog HDL. New Delhi: Pearson.
Harvard
CIletti D Michael, . (2010). Modelling Synthesis and Rapid Prototyping with the Verilog HDL. New Delhi: Pearson.
MLA
CIletti D Michael, . Modelling Synthesis and Rapid Prototyping with the Verilog HDL. New Delhi: Pearson. 2010.