Delta-Sigma A/D-Converters (Record no. 24228)
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| 020 ## - | |
|---|---|
| -- | 9783642345432 |
| -- | 978-3-642-34543-2 |
| 024 7# - | |
| -- | 10.1007/978-3-642-34543-2 |
| -- | doi |
| 050 #4 - | |
| -- | TK5102.9 |
| 050 #4 - | |
| -- | TA1637-1638 |
| 050 #4 - | |
| -- | TK7882.S65 |
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| -- | TTBM |
| -- | bicssc |
| 072 #7 - | |
| -- | UYS |
| -- | bicssc |
| 072 #7 - | |
| -- | TEC008000 |
| -- | bisacsh |
| 072 #7 - | |
| -- | COM073000 |
| -- | bisacsh |
| 082 04 - | |
| -- | 621.382 |
| -- | 23 |
| 100 1# - | |
| -- | Gaggl, Richard. |
| -- | author. |
| 245 10 - | |
| -- | Delta-Sigma A/D-Converters |
| -- | [electronic resource] : |
| -- | Practical Design for Communication Systems / |
| -- | by Richard Gaggl. |
| 264 #1 - | |
| -- | Berlin, Heidelberg : |
| -- | Springer Berlin Heidelberg : |
| -- | Imprint: Springer, |
| -- | 2013. |
| 300 ## - | |
| -- | XVIII, 145 p. 88 illus., 47 illus. in color. |
| -- | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
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| -- | computer |
| -- | c |
| -- | rdamedia |
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| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 490 1# - | |
| -- | Springer Series in Advanced Microelectronics, |
| -- | 1437-0387 ; |
| -- | 39 |
| 505 0# - | |
| -- | Limitations of Delta-Sigma Converters -- A Delta-Sigma Converter with Dynamic-Biasing Technique -- A feed-forward Delta-Sigma Converter for ADSL -- A Delta-Sigma Converter for WLAN using a TEQ. |
| 520 ## - | |
| -- | The emphasis of this book is on practical design aspects for broadband A/D converters for communication systems. The embedded designs are employed for transceivers in the field of ADSL solutions and WLAN applications. An area- and power-efficient realization of a converter is mandatory to remain competitive in the market. The right choice for the converter topology and architecture needs to be done very carefully to result in a competitive FOM. The book begins with a brief overview of basic concepts about ADSL and WLAN to understand the ADC requirements. At architectural level, issues on different modulator topologies are discussed employing the provided technology node. The design issues are pointed out in detail for modern digital CMOS technologies, beginning with 180nm followed by 130nm and going down to 65nm feature size. Beside practical aspects, challenges to mixed-signal design level are addressed to optimize the converters in terms of consumed chip area, power consumption and design for high yield in volume production. Thus, careful considerations on circuit- and architectural- level are performed by introducing a dynamic-biasing technique, a feed-forward approach and a resolution in time instead of amplitude resolution. |
| 650 #0 - | |
| -- | Engineering. |
| 650 #0 - | |
| -- | Systems engineering. |
| 650 14 - | |
| -- | Engineering. |
| 650 24 - | |
| -- | Signal, Image and Speech Processing. |
| 650 24 - | |
| -- | Electronic Circuits and Devices. |
| 650 24 - | |
| -- | Circuits and Systems. |
| 650 24 - | |
| -- | Semiconductors. |
| 710 2# - | |
| -- | SpringerLink (Online service) |
| 773 0# - | |
| -- | Springer eBooks |
| 776 08 - | |
| -- | Printed edition: |
| -- | 9783642345425 |
| 830 #0 - | |
| -- | Springer Series in Advanced Microelectronics, |
| -- | 1437-0387 ; |
| -- | 39 |
| 856 40 - | |
| -- | http://dx.doi.org/10.1007/978-3-642-34543-2 |
| 912 ## - | |
| -- | ZDB-2-ENG |
| 950 ## - | |
| -- | Engineering (Springer-11647) |
| 999 ## - | |
| -- | 24228 |
| -- | 24228 |
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